The present invention relates to a pattern forming method for forming patterns of a semiconductor integrated circuit, including a fine small pattern, with a high accuracy and a high throughput.
In a semiconductor manufacture method, an optical lithography has been used widely for manufacturing devices because of its processing simplicity and low cost. Technical developments have been continuously made, and in recent years, downsizing of an element to 0.25 .mu.m or less has come to be nearly achieved by introducing short waves (e.g., by a KrF excimer laser light source). To further prosecuting the downsizing, developments in ArF excimer laser light sources using a much shorter wave and phase shift masks of a Levenson type have been made and those light sources and masks are expected to be mass-production lithography tools capable of respond to 0.15 .mu.m rules. However, since many problems exist in view of realizing such tools, the development period thereof has prolonged and there is a fear that the development of such tools cannot catch up with the speed of downsizing.
In contrast, in case of an electronic beam lithography as a candidate for a post light lithography, it has been proved that processing up to 0.01 .mu.m can be carried out with use of a narrow converged beam. Although this lithography method will not lead to any problem from the viewpoint of downsizing, its throughput suggests several problems. More specifically, since fine small patterns are drawn, one after another, drawing of patterns inevitably takes a longer time period. In order to shorten the drawing time period, several devices have been developed, for example, including a cell projection method in which a repeatable part common to ULSI patterns is partially drawn at once. However, even with use of those devices, the electronic beam lithography cannot yet catch up with the throughput obtained by a light lithography.
As a method for increasing the throughput of the electronic beam lithography, there has been a proposal of a method in which pattern transfer onto one same resist is carried out by means of light exposure and electronic beam exposure, so that the exposure area to be exposed to an electron beam is reduced and the number of wafers which an electronic beam drawing device can process per hour is thereby increased, i.e., a so-called Mixed and Match method of mixing and matching light and an electron beam (EB) in one same layer.
Japanese Patent Application KOKAI Publication No. 4-155812 discloses that pattern transfer onto one same resist is carried out by means of light exposure and electron beam exposure using a phase shift mask in a lithography step of forming a pattern. In this publication, most of patterns for constructing elements are transferred by a phase shift mask and drawing with an electron beam is used to compensate for a portion which causes a trouble due to positioning by a phase shifter, so that the area to be drawn with a electron beam is reduced as much as possible. In this manner, the number of wafers which an electron beam drawing device can process per hour is increased.
However, in this method, the drawing area is small but a pattern requiring a resolution lower than the limit resolution of the shift mask cannot be transferred, so that it is impossible to respond to further downsizing of devices. In addition, exposure is carried out two times for one same resist, one time being by light exposure and the other time being by electron beam exposure, and therefore, a positional displacement between the two times will lead to a significant problem.
In case of manufacturing various types of elements in units of small lots, preparation of masks requires a long time period. As a countermeasure for solving this problem, Japanese Patent Application KOKAI Publication No. 1-293616 discloses a method in which a group of function blocks common to various types of semiconductor elements is exposed to light while a pattern respectively inherent to only one type of semiconductor elements is drawn with an electron beam. Specifically, a mask common to various types of elements is previously prepared and a portion in which a pattern should be changed is drawn by electron beam drawing. In this method, masks need not be prepared respectively for various types of masks, so that the time period from design of an element to manufacture thereof can be shortened.
However, this method cannot respond to a case in which a function block includes a pattern of a resolution lower than the limit resolution of light exposure, either, like in the method described before. In addition, since patterns to be drawn with an electron beam are wiring portions or the like and patterns must be drawn, one after another, in case of adopting electron beam exposure, a long time is required inevitably. Further, the problem of a positional displacement between light exposure and electron beam exposure still exists unsolved.
Thus, the conventionally used Mix and Match method of using light and an electron beam in one same layer results in problems that high resolution performance of electron beam exposure cannot be sufficiently effected and the throughput cannot achieve the same level as a light stepper.